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C8051F380/1/2/3/4/5/6/7/C
19.5. Programmable Internal Low-Frequency (L-F) Oscillator
All C8051F380/1/2/3/4/5/6/7/C devices include a programmable low-frequency internal oscillator, which is
calibrated to a nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can
be changed to divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR
Definition 19.5). Additionally, the OSCLF[3:0] bits can be used to adjust the oscillator ’s output frequency.
19.5.1. Calibrating the Internal L-F Oscillator
Timers 2 and 3 include capture functions that can be used to capture the oscillator frequency, when run-
ning from a known time base. When either Timer 2 or Timer 3 is configured for L-F Oscillator Capture
Mode, a falling edge (Timer 2) or rising edge (Timer 3) of the low-frequency oscillator ’s output will cause a
capture event on the corresponding timer. As a capture event occurs, the current timer value
(TMRnH:TMRnL) is copied into the timer reload registers (TMRnRLH:TMRnRLL). By recording the differ-
ence between two successive timer capture values, the low-frequency oscillator ’s period can be calcu-
lated. The OSCLF bits can then be adjusted to produce the desired oscillator frequency.
SFR Definition 19.5. OSCLCN: Internal L-F Oscillator Control
Bit
7
6
5
4
3
2
1
0
Name
Type
OSCLEN
R/W
OSCLRDY
R
OSCLF[3:0]
R.W
OSCLD[1:0]
R/W
Reset
0
0
Varies
Varies
Varies
Varies
0
0
SFR Address = 0x86; SFR Page = All Pages
Bit Name
Function
7
6
OSCLEN
OSCLRDY
Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
Internal L-F Oscillator Ready.
0: Internal L-F Oscillator frequency not stabilized.
1: Internal L-F Oscillator frequency stabilized.
Note: OSCLRDY is only set back to 0 in the event of a device reset or a change to the
OSCLD[1:0] bits.
5:2
1:0
148
OSCLF[3:0] Internal L-F Oscillator Frequency Control Bits.
Fine-tune control bits for the Internal L-F oscillator frequency. When set to 0000b, the
L-F oscillator operates at its fastest setting. When set to 1111b, the L-F oscillator
operates at its slowest setting. The OSCLF bits should only be changed by firmware
when the L-F oscillator is disabled (OSCLEN = 0).
OSCLD[1:0] Internal L-F Oscillator Divider Select.
00: Divide by 8 selected.
01: Divide by 4 selected.
10: Divide by 2 selected.
11: Divide by 1 selected.
Rev. 1.4
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